FPGAs or Field Programmable Gate Arrays are essentially programmable/reconfigurable hardware. A particular CPU architecture can be thought of as hardcoded whereas in contrast, FPGAs let you change the processor “architecture” any time you like. The trade-off is performance versus flexibility. While their gate configurations are reprogrammable, the different process utilized to make FPGAs mean that their switching speeds are going to be far slower than with dedicated gate designs.
On the other hand, the fact that you can tailor the “hardware” for a particular task or algorithm means that it has the potential to execute way way faster than implementing that algorithm in terms of a fixed assembly language instruction set. The caveat is that assembly language is pretty cumbersome as it is and programming at the gate level is going to be an even lower-level task.
The apparent return you get for having to endure the much more difficult programming task is that you effectively get much more computing power for the same amount of energy/power consumed. The analogy would be that of using a lower-level language to wring more performance out of less powerful hardware.
A great, aptly-named FPGA site that discusses fun FPGA projects: